TY - JOUR
ID - 37
TI - A-New-Closed-form-Mathematical-Approach-to-Achieve Minimum Phase Noise in Frequency Synthesizers
JO - Journal of Electrical and Computer Engineering Innovations (JECEI)
JA - JECEI
LA - en
SN - 2322-3952
AU - SamadiGorji, S.
AU - Zakeri, B.
AU - Zahabi, M.R.
AD - Babol Nushirvani University of Technology, Department of Electrical Engineering, Babol, Iran
Y1 - 2014
PY - 2014
VL - 2
IS - 1
SP - 7
EP - 13
KW - Frequency synthesizers
KW - Phase noise
KW - Phase-locked loop
KW - Phase noise reduction
DO - 10.22061/jecei.2014.37
N2 - The aim of this paper is to minimize output phase noise for the pure signal synthesis in the frequency synthesizers. For this purpose, first, an exact mathematical model of phase locked loop (PLL) based frequency synthesizer is described and analyzed. Then, an exact closed-form formula in terms of synthesizer bandwidth and total output phase noise is extracted. Based on this formula, the phase noise diagram as a function of bandwidth is plotted. From the analysis and simulation results, it is observed that the synthesizer has a minimum phase noise at a particular bandwidth.
UR - https://jecei.sru.ac.ir/article_37.html
L1 - https://jecei.sru.ac.ir/article_37_32eb6a01e938e239234238a48f777681.pdf
ER -