Shahid Rajaee Teacher Training University Journal of Electrical and Computer Engineering Innovations (JECEI) 2322-3952 8 1 2020 01 01 A Novel Method Design Multiplexer Quaternary with CNTFET 9 18 1419 10.22061/jecei.2020.7091.356 EN S. Rahmati Department of Electrical Engineering, Mahshahr Branch, Islamic Azad University, Mahshahr, Iran E. Farshidi Department of Electrical Engineering, Mahshahr Branch, Islamic Azad University, Mahshahr, Iran Department of Electrical Engineering, Shahid Chamran University of Ahvaz, Ahvaz, Iran. J. Ganji Department of Electrical Engineering, Mahshahr Branch, Islamic Azad University, Mahshahr, Iran Journal Article 2019 02 04 Background and Objectives: In recent decades, due to the effect of the short channel, the use of CMOS transistors in the nanoscale has become a major concern. One option to deal with this issue is the use of nano-transistors. Methods: Using nano-transistors and multi-valued logic (MVL) can reduce the level of chips and connections and have a direct impact on power consumption. The present study reports the design of a new method of Multiplexers (MUXs) based on quaternary logic and transistors of carbon nanotubes (CNTFET) and having a new look at the layout and use of MUXs. Results:The use of special rotary functions and unary operators in Quaternary logic in the design of MUXs reduced the number of CNTFETs from 27% to 54%. Also, the use of MUXs in the Adder structure resulted in a 54% reduction in Power Delay Product (PDP) and a 17.5% to 85.6% reduction in CNTFET counts. Conclusion: The simulated results display a significant improvement in the fabrication of Adders, average power consumption, speed, and PDP compared to the current best-performing techniques in the literature. The proposed operators and circuits were evaluated under various operating conditions. The results show the stability of the proposed circuits.

https://jecei.sru.ac.ir/article_1419_6a7e592fbb2cfd8813b1de9ec5f83509.pdf