Low-Area/Low-Power CMOS Op-Amps Design Based on Total Optimality Index Using Reinforcement Learning Approach

Document Type: Research Paper

Authors

1 Department of Electrical and Computer Engineering University of Birjand Birjand, Iran

2 Department of Electrical and Computer Engineering University of Birjand, Birjand, Iran

10.22061/jecei.2019.5212.203

Abstract

This paper presents the application of reinforcement learning in automatic analog IC design. In this work, the Multi-Objective approach by Learning Automata is evaluated for accommodating required functionalities and performance specifications considering optimal minimizing of MOSFETs area and power consumption for two famous CMOS op-amps. The results show the ability of the proposed method to optimize aforementioned objectives, compared with three MO well-known algorithms (including Particle Swarm Optimization, Inclined Planes system Optimization, and Genetic Algorithm). So that for a two-stage CMOS op-amp, it is obtained 560.42 μW power and 72.825 〖μm〗^2 area, and power 214.15 μW and area 13.76 〖μm〗^2 for a single-ended folded-cascode op-amp. In addition to evaluating the Pareto-fronts obtained based on Overall Non-dominated Vector Generation and Spacing criteria, in terms of Total Optimality Index, MOLA for both cases has been able to have the best performance between the applied methods, and other researches with values of -25.683 and -34.16 dB, respectively.

Graphical Abstract

Low-Area/Low-Power CMOS Op-Amps Design Based on Total Optimality Index Using Reinforcement Learning Approach

Keywords

Main Subjects


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