A-New-Closed-form-Mathematical-Approach-to-Achieve Minimum Phase Noise in Frequency Synthesizers

SamadiGorji, S.; Zakeri, B.; Zahabi, M.R.

doi:10.22061/jecei.2014.37

Document Type : Original Research Paper

Authors

Babol Nushirvani University of Technology, Department of Electrical Engineering, Babol, Iran

https://doi.org/10.22061/jecei.2014.37

Abstract

The aim of this paper is to minimize output phase noise for the pure signal synthesis in the frequency synthesizers. For this purpose, first, an exact mathematical model of phase locked loop (PLL) based frequency synthesizer is described and analyzed. Then, an exact closed-form formula in terms of synthesizer bandwidth and total output phase noise is extracted. Based on this formula, the phase noise diagram as a function of bandwidth is plotted. From the analysis and simulation results, it is observed that the synthesizer has a minimum phase noise at a particular bandwidth.

Keywords

20.1001.1.23223952.2014.2.1.2.9

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Journal of Electrical and Computer Engineering Innovations (JECEI)

A-New-Closed-form-Mathematical-Approach-to-Achieve Minimum Phase Noise in Frequency Synthesizers

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Volume 2, Issue 1 - Serial Number 3
January 2014
Pages 7-13

A-New-Closed-form-Mathematical-Approach-to-Achieve Minimum Phase Noise in Frequency Synthesizers

References

References

Send comment about this article

Volume 2, Issue 1 - Serial Number 3January 2014Pages 7-13

Volume 2, Issue 1 - Serial Number 3
January 2014
Pages 7-13