P. Amiri; M. Kohestani; M. Seifouri
Abstract
In this paper, we investigate the parameters affecting Total Harmonic Distortion (THD) and Power Supply Rejection Ratio (PSRR) in PWM Class D Amplifiers (CDAs) on the basis of linear models with feedback. From our mathematical analysis, we show that the THD of a PWM Class D amplifier with feedback can ...
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In this paper, we investigate the parameters affecting Total Harmonic Distortion (THD) and Power Supply Rejection Ratio (PSRR) in PWM Class D Amplifiers (CDAs) on the basis of linear models with feedback. From our mathematical analysis, we show that the THD of a PWM Class D amplifier with feedback can be improved by increasing the gain of the integrator through adding another amplifier at the output of the integrator. We also show that the THD can be further improved by means of two cascaded amplifiers with a single pole. We verify our analysis by means of PSPICE simulations. Simulation results show that the THD of the gain boosting and the two cascaded amplifiers with a single pole CDAs can be improved by as much as 1.4 times and 2 times, respectively.
P. Amiri; M. Sharafi
Abstract
This paper presents a novel control method to improve the efficiency of low-voltage DC-DC converters at light loads. Pulse Width Modulation (PWM) converters have poor efficiencies at light loads, while pulse frequency modulation (PFM) control is more efficient for the same cases. Switching losses constitute ...
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This paper presents a novel control method to improve the efficiency of low-voltage DC-DC converters at light loads. Pulse Width Modulation (PWM) converters have poor efficiencies at light loads, while pulse frequency modulation (PFM) control is more efficient for the same cases. Switching losses constitute a major portion of the total power loss at light loads. To decrease the switching losses and to increase efficiency, converters based on soft-switching are utilized. This paper presents the design of a soft-switching DC-DC buck converter in a 90-nm CMOS technology. Simulation results by HSPICE shows a 21 mV output ripple on a 0.5 V output voltage for an input voltage of 1.4 V. Finally, the efficiency of 95% at a load current of 50 mA having 74 mA of current ripple is achievable.
