Electronics
S. H. Rakib; S. N. Biswas
Abstract
Background and Objectives: The automobile industry is becoming more technologically advanced. Modern vehicles are expensive, but they have cutting-edge security features. As a result, the average individual who can afford low-end vehicles must forego the latest improvements, such as greater safety. Therefore, ...
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Background and Objectives: The automobile industry is becoming more technologically advanced. Modern vehicles are expensive, but they have cutting-edge security features. As a result, the average individual who can afford low-end vehicles must forego the latest improvements, such as greater safety. Therefore, the main goal was to create a small Internet of Things device that could be used on a mobile device to notify the user when a car comes from the opposite direction. It will promote human safety by alerting users to that vehicle. The preparation, integration, and deployment of a modern IoT-based vehicle detection device have been described in this work. From there, it goes through the OpenROAD toolchain, and OpenSTA is used for static timing analysis (STA) and the ASAP7 PDK is used for the design. In this paper, provide a performance evaluation study across all three metrics (power, performance and area), as well as the entire design flow from hardware description to final implementation.Methods: The entire behavioral level code goes through several stages before reaching a physical perspective, where various tools are used for multiple tasks. To obtain the desired physical-level architecture, first, use a tool to obtain the netlist file, including every G-cell map with a PDK-specific gate-level representation. Then, several stages will be followed to get the device’s physical view.Results: Throughout the entire experiment, the transition from RTL to GDSII was successfully achieved. Once the complete design is finished, the area, power, and timings all appear fine. Another unique characteristic is that the chip employed 7nm technology. The 5 GHz frequency was attained when the chip functioned flawlessly without DRC or any connection problems, timing, or DRV violations. Less than 1 percent is the maximum allowable IR loss maintained. Over 80% of the total space was utilized effectively.Conclusion: To build an IoT gadget manufacturable with the best PPA, the general experiment was to write RTL code and proceed to the tap-out stage. The experiment achieved the best result by utilizing open-source chip design tools. Additionally, there are no DRC violations, timing problems, or power loss.
Electronics
A. Ebadiyan; A. Shokri; M. Amirmazlaghani; N. Darestani Farahani
Abstract
Background and Objectives: Semiconductor junction-based radioisotope detectors are commonly used in radioisotope batteries due to their small size and excellent performance. This study aims to design a betavoltaic battery based on a metal-porous semiconductor Schottky structure, comprising an N-type ...
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Background and Objectives: Semiconductor junction-based radioisotope detectors are commonly used in radioisotope batteries due to their small size and excellent performance. This study aims to design a betavoltaic battery based on a metal-porous semiconductor Schottky structure, comprising an N-type zinc oxide (ZnO) semiconductor and platinum (Pt) metal. Methods: we utilized the TCAD-SILVACO 3D simulator to simulate the device, and a C-Interpreter code was applied to simulate the beta particle source, which was an electron beam with an average energy equivalent to 63Ni beta particles. The short circuit current, open-circuit voltage, fill factor (FF), and efficiency of the designed structure were calculated through simulation. Additionally, we discussed the theoretical justification based on the energy band structure. Results: The energy conversion efficiency of the proposed structure was calculated to be 11.37% when bulk ZnO was utilized in the Schottky junction. However, by creating pores and increasing the effective junction area, a conversion efficiency of 35.5% was achieved. The proposed structure exhibited a short-circuit current, open-circuit voltage, and fill factor (FF) of 37.5 nA, 1.237 V, and 76.5%, respectively.Conclusion: This study explored a betavoltaic device with a porous structure based on a Schottky junction between Pt and ZnO semiconductor. The creation of pores increased the contact surface area and effectively trapped beta beams, resulting in improved performance metrics such as efficiency, short circuit current, and open-circuit voltage.
Electronics
Z. Ahangari
Abstract
Background and Objectives: In this study, a reconfigurable field-effect transistor has been developed utilizing a multi-doped source-drain region, enabling operation in both n-mode and p-mode through a simple adjustment of electrode bias. In contrast to traditional reconfigurable transistors that rely ...
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Background and Objectives: In this study, a reconfigurable field-effect transistor has been developed utilizing a multi-doped source-drain region, enabling operation in both n-mode and p-mode through a simple adjustment of electrode bias. In contrast to traditional reconfigurable transistors that rely on Schottky barrier source/drain with identical Schottky barrier height, the suggested device utilizes a straightforward fabrication process that involves physically multi-doped source and drain. The proposed structure incorporates a bilayer of n+ and p+ in the source and drain regions.Methods: The device simulator Silvaco (ATLAS) is utilized to conduct the numerical simulations.Results: The transistor exhibits consistent transfer characteristics in both modes of operation. The influence of key design parameters on device performance has been analyzed. A notable aspect of this transistor is the integration of an XNOR logic gate within a single device, rendering it suitable for high-performance computing circuits. The findings indicate that on-state currents of 142 µA/µm and 57.2 µA/µm, along with on/off current ratio of 8.68×107 and 3.5×107, have been attained for n-mode and p-mode operation, respectively.Conclusion: A single-transistor XNOR gate design offers potential advantages for future computing circuits due to its simplicity and reduced component count, which could lead to smaller, more energy-efficient, and potentially faster computing systems. This innovation may pave the way for advancements in low-power and high-density electronic devices.
Electronics
M. Karbalaei; D. Dideban; N. Moezi
Abstract
Background and Objectives: In this work, a dual workfunction gate-source pocket-retrograde doping-tunnel field effect transistor (DWG SP RD-TFET) is proposed and investigated.Methods: The dual workfunction gate-source pocket-retrograde doping-tunnel field effect transistor is a Silicon-channel TFET with ...
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Background and Objectives: In this work, a dual workfunction gate-source pocket-retrograde doping-tunnel field effect transistor (DWG SP RD-TFET) is proposed and investigated.Methods: The dual workfunction gate-source pocket-retrograde doping-tunnel field effect transistor is a Silicon-channel TFET with two isolated metal gates (main gate and auxiliary gate) and a source pocket in the channel close to the source-channel junction to increase the carrier tunneling rate.Results: For further enhancement in the tunneling rate, source doping near the source-channel junction, i.e., underneath the auxiliary gate is heavily doped to create more band bending in energy band diagram. Retrograde doping in the channel along with auxiliary gate over the source region also improve device subthreshold swing and leakage current. Based on our simulation results, excellent electrical characteristics with ION/IOFF ratio > 109, point subthreshold swing (SS) of 6 mV/dec and high gm/ID ratio at room temperature shows that this tunneling FET can be a promising device for low power applicationsConclusion: In order to increase the ON-current in this device, we utilized several methods including incorporation of high-K material in top oxide, source pocket in channel and a thin auxiliary gate with high workfunction over the source region. Incorporating auxiliary gate over the source also caused a barrier formation in the energy band diagram profile of this device which it leds electron concentration in the channel, subthreshold swing and OFF-current to be reduced.
